Renesas Electronics /R7FA6M3AH /GLCDC /GR1_AB1

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Interpret as GR1_AB1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)DISPSEL 0 (0)GRCDISPON 0 (0)ARCDISPON 0 (0)ARCON

DISPSEL=00, ARCDISPON=0, GRCDISPON=0, ARCON=0

Description

Graphics 1 Alpha Blending Control Register 1

Fields

DISPSEL

Graphics display plane control.

0 (00): Background color display (value set by the GRn_BASE register).

1 (01): Lower-layer graphics display

2 (10): Current graphics display

3 (11): Blended display of lower-layer graphics (input image from the previous stage) and current graphics (graphics data read from the AHB bus)

GRCDISPON

Graphics image area border display control.

0 (0): Display off

1 (1): Display on

ARCDISPON

Image area border display control for rectangular area alpha blending.

0 (0): Display off

1 (1): Display on

ARCON

Rectangular area alpha blending control.

0 (0): Off

1 (1): On

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